philips semiconductors product specification powermos transistors php10n40e, phb10n40e, PHW10N40E avalanche energy rated features symbol quick reference data ? repetitive avalanche rated ? fast switching v dss = 400 v ? stable off-state characteristics ? high thermal cycling performance i d = 10.6 a ? low thermal resistance r ds(on) 0.55 w general description n-channel, enhancement mode field-effect power transistor, intended for use in off-line switched mode power supplies, t.v. and computer monitor power supplies, d.c. to d.c. converters, motor control circuits and general purpose switching applications. the php10n40e is supplied in the sot78 (to220ab) conventional leaded package. the PHW10N40E is supplied in the sot429 (to247) conventional leaded package. the phb10n40e is supplied in the sot404 surface mounting package. pinning sot78 (to220ab) sot404 sot429 (to247) pin description 1 gate 2 drain 1 3 source tab drain limiting values limiting values in accordance with the absolute maximum system (iec 134) symbol parameter conditions min. max. unit v dss drain-source voltage t j = 25 ?c to 150?c - 400 v v dgr drain-gate voltage t j = 25 ?c to 150?c; r gs = 20 k w - 400 v v gs gate-source voltage - 30 v i d continuous drain current t mb = 25 ?c; v gs = 10 v - 10.6 a t mb = 100 ?c; v gs = 10 v - 6.7 a i dm pulsed drain current t mb = 25 ?c - 42 a p d total dissipation t mb = 25 ?c - 147 w t j , t stg operating junction and - 55 150 ?c storage temperature range d g s 123 tab 13 tab 2 2 3 1 1 it is not possible to make connection to pin 2 of the sot404 package. december 1998 1 rev 1.200
philips semiconductors product specification powermos transistors php10n40e, phb10n40e, PHW10N40E avalanche energy rated avalanche energy limiting values limiting values in accordance with the absolute maximum system (iec 134) symbol parameter conditions min. max. unit e as non-repetitive avalanche unclamped inductive load, i as = 8.8 a; - 526 mj energy t p = 0.23 ms; t j prior to avalanche = 25?c; v dd 50 v; r gs = 50 w ; v gs = 10 v; refer to fig:17 e ar repetitive avalanche energy 2 i ar = 10.6 a; t p = 2.5 m s; t j prior to - 13 mj avalanche = 25?c; r gs = 50 w ; v gs = 10 v; refer to fig:18 i as , i ar repetitive and non-repetitive - 10.6 a avalanche current thermal resistances symbol parameter conditions min. typ. max. unit r th j-mb thermal resistance junction - - 0.85 k/w to mounting base r th j-a thermal resistance junction sot78 package, in free air - 60 - k/w to ambient sot429 package, in free air - 45 - k/w sot404 package, pcb mounted, minimum - 50 - k/w footprint 2 pulse width and repetition rate limited by t j max. december 1998 2 rev 1.200
philips semiconductors product specification powermos transistors php10n40e, phb10n40e, PHW10N40E avalanche energy rated electrical characteristics t j = 25 ?c unless otherwise specified symbol parameter conditions min. typ. max. unit v (br)dss drain-source breakdown v gs = 0 v; i d = 0.25 ma 400 - - v voltage d v (br)dss / drain-source breakdown v ds = v gs ; i d = 0.25 ma - 0.1 - %/k d t j voltage temperature coefficient r ds(on) drain-source on resistance v gs = 10 v; i d = 5.3 a - 0.42 0.55 w v gs(to) gate threshold voltage v ds = v gs ; i d = 0.25 ma 2.0 3.0 4.0 v g fs forward transconductance v ds = 30 v; i d = 5.3 a 3.5 6 - s i dss drain-source leakage current v ds = 400 v; v gs = 0 v - 1 25 m a v ds = 320 v; v gs = 0 v; t j = 125 ?c - 30 250 m a i gss gate-source leakage current v gs = 30 v; v ds = 0 v - 10 200 na q g(tot) total gate charge i d = 10.6 a; v dd = 320 v; v gs = 10 v - 90 110 nc q gs gate-source charge - 7 9 nc q gd gate-drain (miller) charge - 49 60 nc t d(on) turn-on delay time v dd = 200 v; r d = 18 w ; - 13 - ns t r turn-on rise time r g = 9.1 w -65-ns t d(off) turn-off delay time - 108 - ns t f turn-off fall time - 70 - ns l d internal drain inductance measured from tab to centre of die - 3.5 - nh l d internal drain inductance measured from drain lead to centre of die - 4.5 - nh (sot78 package only) l s internal source inductance measured from source lead to source - 7.5 - nh bond pad c iss input capacitance v gs = 0 v; v ds = 25 v; f = 1 mhz - 1080 - pf c oss output capacitance - 190 - pf c rss feedback capacitance - 110 - pf source-drain diode ratings and characteristics t j = 25 ?c unless otherwise specified symbol parameter conditions min. typ. max. unit i s continuous source current t mb = 25?c - - 10.6 a (body diode) i sm pulsed source current (body t mb = 25?c - - 42 a diode) v sd diode forward voltage i s = 10.6 a; v gs = 0 v - - 1.2 v t rr reverse recovery time i s = 10.6 a; v gs = 0 v; di/dt = 100 a/ m s - 330 - ns q rr reverse recovery charge - 4.8 - m c december 1998 3 rev 1.200
philips semiconductors product specification powermos transistors php10n40e, phb10n40e, PHW10N40E avalanche energy rated fig.1. normalised power dissipation. pd% = 100 p d /p d 25 ?c = f(t mb ) fig.2. normalised continuous drain current. id% = 100 i d /i d 25 ?c = f(t mb ); conditions: v gs 3 10 v fig.3. safe operating area. t mb = 25 ?c i d & i dm = f(v ds ); i dm single pulse; parameter t p fig.4. transient thermal impedance. z th j-mb = f(t); parameter d = t p /t fig.5. typical output characteristics . i d = f(v ds ); parameter v gs fig.6. typical on-state resistance . r ds(on) = f(i d ); parameter v gs 0 20 40 60 80 100 120 140 tmb / c pd% normalised power derating 120 110 100 90 80 70 60 50 40 30 20 10 0 1ms 1s 0.001 0.01 0.1 1 php6n60 zth j-mb, transient thermal impedance (k/w) 1us 10us 100us 10ms 100ms tp, pulse width (s) d = t p t p t t p t d d = 0.5 0.2 0.05 0.02 single pulse 0.1 0 20 40 60 80 100 120 140 tmb / c id% normalised current derating 120 110 100 90 80 70 60 50 40 30 20 10 0 0 5 10 15 20 25 30 0 10 20 30 40 5.5 v 6 v 6.5 v 7 v 10 v php10n40 vds, drain-source voltage (volts) id, drain current (amps) 5 v vgs = 4.5 v tj = 25 c 1 10 100 1000 vds / v id / a 100 10 1 0.1 buk457-400b tp = 10 us 100 us 1 ms 10 ms 100 ms dc rds(on) = vds/id 0 5 10 15 20 25 30 35 0 0.2 0.4 0.6 0.8 1 php10n40 5 v 5.5 v 10 v id, drain current (amps) rds(on), drain-source on resistance (ohms) 4.5 v 6 v 6.5 v tj = 25 c vgs = 7 v december 1998 4 rev 1.200
philips semiconductors product specification powermos transistors php10n40e, phb10n40e, PHW10N40E avalanche energy rated fig.7. typical transfer characteristics. i d = f(v gs ); parameter t j fig.8. typical transconductance . g fs = f(i d ); parameter t j fig.9. normalised drain-source on-state resistance. a = r ds(on) /r ds(on)25 ?c = f(t j ); i d = 5.3 a; v gs = 10 v fig.10. gate threshold voltage . v gs(to) = f(t j ); conditions: i d = 0.25 ma; v ds = v gs fig.11. sub-threshold drain current. i d = f(v gs) ; conditions: t j = 25 ?c; v ds = v gs fig.12. typical capacitances, c iss , c oss , c rss . c = f(v ds ); conditions: v gs = 0 v; f = 1 mhz 0246810 0 10 20 30 40 php10n40 vgs, gate-source voltage (volts) id, drain current (amps) tj = 25 c tj = 150 c vds > id x rds(on)max -60 -40 -20 0 20 40 60 80 100 120 140 tj / c vgs(to) / v 4 3 2 1 0 max. typ. min. 0 10203040 0 2 4 6 8 10 php10n40 id, drain current (a) gfs, transconductance (s) tj = 25 c 150 c vds > id x rds(on)max 0 1 2 3 4 vgs / v id / a 1e-01 1e-02 1e-03 1e-04 1e-05 1e-06 sub-threshold conduction typ 2 % 98 % -60 -40 -20 0 20 40 60 80 100 120 140 tj / c normalised rds(on) = f(tj) 2 1 0 a 1 10 100 1000 10 100 1000 10000 php10n40 vds, drain-source voltage (volts) junction capacitances (pf) ciss coss crss december 1998 5 rev 1.200
philips semiconductors product specification powermos transistors php10n40e, phb10n40e, PHW10N40E avalanche energy rated fig.13. typical turn-on gate-charge characteristics. v gs = f(q g ); parameter v ds fig.14. typical switching times ; t d(on) , t r , t d(off) , t f = f(r g ) fig.15. normalised drain-source breakdown voltage ; v (br)dss /v (br)dss 25 ?c = f(t j ) fig.16. source-drain diode characteristic. i f = f(v sds ); parameter t j fig.17. maximum permissible non-repetitive avalanche current (i as ) versus avalanche time (t p ); unclamped inductive load fig.18. maximum permissible repetitive avalanche current (i ar ) versus avalanche time (t p ) 0 50 100 150 0 5 10 15 php10n40 qg, gate charge (nc) vgs, gate-source voltage (volts) vdd = 320 v 200 v 80 v id = 10.6 a tj = 25 c 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 5 10 15 20 php10n40 vsds, source-drain voltage (volts) if, source-drain diode current (amps) vgs = 0 v tj = 25 c 150 c 0 102030405060 10 100 1000 td(on) td(off) php10n40 rg, gate resistance (ohms) switching times (ns) tj = 25 c rd = 18 ohms vdd = 200 v vgs = 10 v tf tr php10n40e 0.1 1 10 100 1e-06 1e-05 1e-04 1e-03 1e-02 avalanche time, tp (s) non-repetitive avalanche current, ias (a) 125 c vds id tp tj prior to avalanche = 25 c -100 -50 0 50 100 150 0.85 0.9 0.95 1 1.05 1.1 1.15 tj, junction temperature (c) normalised drain-source breakdown voltage v(br)dss @ tj v(br)dss @ 25 c php10n40e 0.01 0.1 1 10 100 1e-06 1e-05 1e-04 1e-03 1e-02 avalanche time, tp (s) maximum repetitive avalanche current, iar (a) 125 c tj prior to avalanche = 25 c december 1998 6 rev 1.200
philips semiconductors product specification powermos transistors php10n40e, phb10n40e, PHW10N40E avalanche energy rated mechanical data dimensions in mm net mass: 2 g fig.19. sot78 (to220ab); pin 2 connected to mounting base. notes 1. observe the general handling precautions for electrostatic-discharge sensitive devices (esds) to prevent damage to mos gate oxide. 2. refer to mounting instructions for sot78 (to220) envelopes. 3. epoxy meets ul94 v0 at 1/8". 10,3 max 3,7 2,8 3,0 3,0 max not tinned 1,3 max (2x) 123 2,4 0,6 4,5 max 5,9 min 15,8 max 1,3 2,54 2,54 0,9 max (3x) 13,5 min december 1998 7 rev 1.200
philips semiconductors product specification powermos transistors php10n40e, phb10n40e, PHW10N40E avalanche energy rated mechanical data dimensions in mm net mass: 1.4 g fig.20. sot404 : centre pin connected to mounting base. mounting instructions dimensions in mm fig.21. sot404 : soldering pattern for surface mounting . notes 1. observe the general handling precautions for electrostatic-discharge sensitive devices (esds) to prevent damage to mos gate oxide. 2. epoxy meets ul94 v0 at 1/8". 11 max 4.5 max 1.4 max 10.3 max 0.5 15.4 2.5 0.85 max (x2) 2.54 (x2) 17.5 11.5 9.0 5.08 3.8 2.0 december 1998 8 rev 1.200
philips semiconductors product specification powermos transistors php10n40e, phb10n40e, PHW10N40E avalanche energy rated mechanical data dimensions in mm net mass: 5 g fig.22. sot429; pin 2 connected to mounting base. notes 1. observe the general handling precautions for electrostatic-discharge sensitive devices (esds) to prevent damage to mos gate oxide. 2. refer to mounting instructions for sot429 envelope. 3. epoxy meets ul94 v0 at 1/8". 5.3 4.0 21 max 15.5 min 1 2.2 max 0.4 2.5 0.9 max 5.3 max 3.5 16 max 5.45 seating plane 5.45 m o max 15.5 max 3.2 max 2 3 1.1 3.5 1.8 7.3 max december 1998 9 rev 1.200
philips semiconductors product specification powermos transistors php10n40e, phb10n40e, PHW10N40E avalanche energy rated definitions data sheet status objective specification this data sheet contains target or goal specifications for product development. preliminary specification this data sheet contains preliminary data; supplementary data may be published later. product specification this data sheet contains final product specifications. limiting values limiting values are given in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of this specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the specification. philips electronics n.v. 1998 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. life support applications these products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. december 1998 10 rev 1.200
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